Etudiant : EL AFGHANI AHLAME

Filière : Master Microélectronique, Signaux et Systèmes (2ME2S)

Encadrant : Pr. BENHALA BACHIR

Annèe : 2024

Résumé : Fault tolerance is a crucial functionality in safety-critical systems where failure can cause death or serious injury to people, loss or severe damage to equipment, or environmental harm. Therefore, safety-critical embedded systems are vital in such applications. However, these systems are subjected to high licensing costs and export restrictions. RISC-V ISA has emerged as an inherent solution. Being open source, it has gained popularity among research institutions and numerous platforms were developed using this ISA. Yet, very few of them are safety-relevant. In this master thesis, we robustify a RISC-V Microcontroller to enable its use in safety-critical systems by enhancing its fault tolerance. We add parity code to allow error detection in the instruction memory, Hamming SECDED code for single error correction, double error detection in the data memory, and Triple Modular Redundancy technique for the core, where the latter is triplicated and the outputs are set to a voting mechanism that determines the result to be outputted based on majority voting. Key words: Safety-critical Systems, HPC, Safety island, Safety, Reliability, Fault tolerance, Failure, SEU, Fault, Error injection, Error Correcting codes, SECDED, TMR, Majority voter, Lockstep, Diversity, Microcontroller, RISC-V ISA.